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Processing-task arrangement for a low-complexity full-mode WiMAX LDPC codec
Journal article   Peer reviewed

Processing-task arrangement for a low-complexity full-mode WiMAX LDPC codec

Yu-Luen Wang, Yeong-Luh Ueng, Chien-Lien Peng and Chung-Jay Yang
IEEE Transactions on Circuits and Systems I: Regular Papers, Vol.58(2), pp.415-428
2011

Abstract

Channel coding decoder early termination encoder low-density parity-check (LDPC) codes WiMAX
In this paper, we propose dividing the decoding operations of a variety of irregular quasi-cyclic (QC) low-density parity-check (LDPC) codes into several smaller tasks. An algorithm is devised in order to arrange these tasks in a similar form such that a highly reusable multimode architecture can be designed to process these tasks. For this task-based decoder, the associated memory access can be accomplished with the help of the proposed address generators. Using this approach, the difficulty of designing a low-complexity multimode decoder, which is capable of supporting a variety of irregular QC-LDPC codes, can be overcome. Layered encoding that enables the routing networks and memory for decoding to be reused for the encoding is also proposed. Using these techniques, a multimode codec which can support all 114 WiMAX LDPC codes is designed and implemented in a 90-nm process. The full-mode WiMAX codec achieves a moderate encoding (decoding) throughput of 800 Mb/s (200 Mb/s) and occupies an area of only 0.679 mm 2 . © 2011 IEEE.

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