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Reliability study of MOS devices by profiling trap distribution in high-k gate dielectric
Journal article

Reliability study of MOS devices by profiling trap distribution in high-k gate dielectric

Chun-Chang Lu, Kuei-Shu Chang-Liao, Che-Hao Tsao, Hsueh-Chao Ko and Yao-Tung Hsu
Journal of Nanoelectronics and Optoelectronics, Vol.8(4), pp.366-368
06/2013

Abstract

Charge pumping High-k Interface trap Reliability
To better understand the reliability problems, charge pumping (CP) techniques are widely applied to characterize interface trap generation in MOSFETs with high-k gate dielectrics directly from the measurement data without any numerical simulation. Although charge pumping is useful for profiling traps in high-k gated MOSFETS, the parasitic leakage in charge pumping current should be solved first. In this work, a promising method is proposed to separate the charge pumping current from the parasitic leakage in MOSFETs with thin high-k gate dielectric. Results show good correction effects on charge pumping curves, which indicates that the gate leakage component is completely eliminated. The influences of stress and recovery on devices with HfO 2 high-k dielectric are also compared. Moreover, it is demonstrated that the stress induced threshold voltage shifts can be separated into two stages, namely, trap filling stage and trap generation stage. The trap generation stage is only determined by the stress voltage and temperature. The proposed CP technique is useful for the reliability assessment of MOS devices with ultrathin high-k gate dielectrics and the electron devices in the nuclear power plants. © 2013 American Scientific Publishers.

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