Logo image
Schottky barrier silicon nanowire sonos memory with ultralow programming and erasing voltages
Journal article   Peer reviewed

Schottky barrier silicon nanowire sonos memory with ultralow programming and erasing voltages

Chun-Hsing Shih, Wei Chang, Yan-Xiang Luo, Ji-Ting Liang, Ming-Kun Huang, Nguyen Dang Chien, Ruei-Kai Shia, Jr-Jie Tsai, Wen-Fa Wu, Wen-Fa Wu, …
IEEE Electron Device Letters, Vol.32(11), pp.1477-1479
11/2011

Abstract

Gate-all-around nanowire Schottky barrier (SB) Silicon-oxide-nitride-oxide-silicon (SONOS) memory
A new Schottky barrier (SB) nonvolatile nanowire memory is reported experimentally with efficient low-voltage programming and erasing. By applying an SB source/drain to enhance the electrical field in the silicon gate-all-around nanowire, the nonvolatile silicon-oxide-nitride-oxide-silicon (SONOS) memory can operate at gate voltages of 5 to 7 V for programming and-7 to-9 V for erasing through Fowler-Nordheim tunneling. The larger the gate voltage is, the faster the programming/erasing speed and the wider the threshold-voltage shift are attained. Importantly, the SB nanowire SONOS cells exhibit superior 100-K cycling endurance and high-temperature retention without any damages from metallic silicidation process or field-enhanced tunneling. © 2006 IEEE.

Metrics

1 Record Views

Details

Logo image