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Selective Defect Engineering for Gate-Controlled yet Contact-Transparent Bi2O2Se Transistors
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Selective Defect Engineering for Gate-Controlled yet Contact-Transparent Bi2O2Se Transistors

Huynh-Uyen-Phuong Nguyen, Tai-Ting Lee, Yu-Wei Chang, Hung-Chang Hsu, Chih-Yuan Shih, Chi-Chun Cheng, Luc-Phuong-Nhu Tran, Hsin-Chien Chien, Wen-Yuan Fei, Wei-Yen Woon, …
ACS Nano, 卷.20(25), 頁碼.18315-18323
30/06/2026
PMID: 42189665
Web of Science ID: WOS:001777822200001

摘要

Chemistry Chemistry, Multidisciplinary Chemistry, Physical Materials Science, Multidisciplinary Nanoscience & Nanotechnology Science & Technology Science & Technology - Other Topics Materials Science Physical Sciences Technology
Two-dimensional semiconductors offer a pathway toward ultrascaled electronics, yet achieving strong electrostatic gate control without sacrificing low-resistance contacts remains a fundamental challenge. Here, we report a selective defect-engineering strategy that addresses this gate-contact trade-off in Bi2O2Se transistors. Low-temperature nitrogen incorporation passivates selenium vacancies through robust N-Bi bonding, suppressing intrinsic self-doping while preserving the intrinsic band dispersion without introducing midgap states. Density functional theory and scanning tunnelling spectroscopy reveal that nitrogen provides acceptor-like compensation by neutralizing vacancy-induced donor states, rather than through conventional substitutional doping. As a result, the Fermi level shifts toward midgap, enabling precise carrier-density modulation while maintaining band-like transport. By spatially confining nitrogen incorporation to the channel region, Bi2O2Se field-effect transistors are converted from depletion to enhancement mode, achieving high electron mobility and on/off ratios up to 10(9) while preserving ohmic, contact-transparent injection. This selective defect-engineering approach decouples channel electrostatics from contact properties and provides a potentially scalable, thermally benign route toward gate-controllable, contact-transparent two-dimensional transistors compatible with integrated logic architectures.

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https://doi.org/10.1021/acsnano.6c04248檢視
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