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Self‐Aligned Spacer Doping in MoS2 High‐κ Top‐Gate Transistors
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Self‐Aligned Spacer Doping in MoS2 High‐κ Top‐Gate Transistors

Kai‐Chun Huang, Che‐Lun Lee, Hung‐Jui Lin, Yu‐Ting Chen, Tsung‐Hsin Liu, Chang‐Hua Lu, Pin‐Lin Wang, Chi‐Chun Cheng, Cheng‐Chieh Hsieh, Jessie Shiue, …
Advanced Functional Materials, 卷.36(41), e30537
21/05/2026
Web of Science ID: WOS:001706091500001

摘要

2D materials high‐κ insulators self‐aligned doping spacer doping top‐gate transistors
Because 2D materials are atomically thin and free of dangling bonds, integrating high‐κ dielectrics and achieving spacer doping remain challenging using traditional atomic layer deposition (ALD) techniques and ion implantation method. Here, a “high‐κ top‐gate lift‐off” strategy enabling the precise fabrication of underlap MoS2 field‐effect transistors (FETs) with well‐defined spacer regions is presented. A high‐κ Erbium oxide (ErOx) dielectric, deposited by reactive thermal evaporation, provides a dielectric constant of 14.4 and smooth coverage on transition‐metal dichalcogenides (TMDs). The process further incorporates a self‐aligned covalently functionalized n‐doping method to ensure effective contact and spacer doping, achieving uniform carrier concentration and reduced contact resistance. The resulting spacer‐doped top‐gate MoS2 device exhibits an on‐current enhancement of 180‐fold while maintaining an on/off ratio of nearly 108 under single top‐gate operation. Remarkably, the single‐gate configuration outperforms undoped dual‐gate devices in both current level and switching characteristics. This study establishes a scalable and reliable platform for integrating high‐κ dielectrics with self‐aligned doping, paving the way for next‐generation high‐performance 2D electronics. The self‐aligned spacer doping in underlap MoS2 top‐gate transistors integrated with a high‐κ ErOx dielectric formed via reactive thermal evaporation is demonstrated. Combining with a covalently functionalized n‐doping technique, the resulting devices exhibit a field‐effect mobility of 20 cm2 V−1 s−1, a contact resistance as low as 2.3 kΩ µm, and an on/off ratio exceeding 108 under single top‐gate operation.

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