摘要
Simulation-based DRL PCTS developed to optimize process times in cluster tools.•A DES model built to reflect actual process flow and robotic wafer handling.•Experiments use both empirical foundry data and adapted benchmark scenarios.•Sensitivity tests show moderate targets keep gains stable and solution space broad.•Empirical results confirm practical use for real-time process-time adjustments.
Semiconductor manufacturing is increasingly challenged by high product mix and significant operational variability. While prior research has mainly focused on production scheduling to minimize machine downtime, optimize resource allocation, and enhance maintenance efficiency, the studies on the dynamic adjustment of controllable process times in cluster tools such as physical vapor deposition (PVD) systems remains limited. This study proposes a simulation‑integrated deep reinforcement learning framework that adjusts processing times to regulate wafer flow and reduce downstream waiting. A discrete-event simulation model of a PVD cluster tool is developed to accurately represent equipment interdependencies, recipe routings, and capacity constraints. A deep deterministic policy gradient (DDPG) agent is trained within this virtual environment to generate process time policies that minimize wafer waiting time and cycle time while aligning with target makespan objectives. Empirical evaluations using real production data and adapted benchmark scenarios demonstrate that the proposed approach yields substantial performance gains without narrowing the feasible solution space, in which achieving reductions of 31.54% in wafer waiting time and 13.46% in cycle time. The results show the potential of adaptive, learning-based decision support systems in enhancing operational efficiency in advanced semiconductor fabrication.