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Simultaneous constrained pin assignment and escape routing considering differential pairs for FPGA-PCB co-design
Journal article   Peer reviewed

Simultaneous constrained pin assignment and escape routing considering differential pairs for FPGA-PCB co-design

Seong-I Lei and Wai-Kei Mak
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, Vol.32(12), pp.1866-1878
12/2013

Abstract

Differential pairs Escape routing Field-programmable gate array (FPGA)-printed circuit board (PCB) co-design Pin assignment
With the increasing complexity of circuit design in recent years, the pin assignment and escape routing problems for field-programmable gate array (FPGA) on a printed circuit board (PCB) have become greatly difficult due to the fast increase in pin count and density. Most existing works only focus on either the FPGA pin assignment problem or the PCB escape routing problem independently, but cannot handle them simultaneously. In this paper, we propose an integer linear programming based method to simultaneously solve the problem of pin assignment and escape routing for FPGA-PCB co-design. Moreover, differential pairs and single-ended signals are handled together optimally to minimize the total wirelength in escape routing. Encouraging experimental results are shown to support our approach showing reduction in the number of PCB routing layers and/or wirelength. © 1982-2013 IEEE.

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