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Systematic layout planning: A study on semiconductor wafer fabrication facilities
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Systematic layout planning: A study on semiconductor wafer fabrication facilities

Taho Yang, Chao-Ton SuYuan-Ru Hsu
International Journal of Operations and Production Management, 卷.20(11), 頁碼.1359-1371
2000

摘要

Analytical hierarchy process Decision making Layout Material handling Semiconductors
This paper proposes to use Muther's systematic layout planning procedure as the infrastructure to solve a fab layout design problem. A multiple objective decision making tool, analytic hierarchy process, is then proposed to evaluate the design alternatives. The proposed procedure is illustrated to be a viable approach for solving a fab layout design problem through a real-world case study. It features both the simplicity of the design process and the objectivity of the multiple-criteria evaluation process as opposed to existing solution methodologies.

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