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Testing of flow-based microfluidic biochips: Fault modeling, test generation, and experimental demonstration
Journal article   Peer reviewed

Testing of flow-based microfluidic biochips: Fault modeling, test generation, and experimental demonstration

Kai Hu, Feiqiao Yu, Tsung-Yi Ho and Krishnendu Chakrabarty
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, Vol.33(10), pp.1463-1475
01/10/2014

Abstract

Automatic test pattern generation (ATPG) Defects Fault modeling Lab-on-chip Microfluidics Testing
Recent advances in flow-based microfluidics have led to the emergence of biochemistry-on-a-chip as a new paradigm in clinical diagnostics and biomolecular recognition. However, a potential roadblock in the deployment of microfluidic biochips is the lack of test techniques to screen defective devices before they are used for biochemical analysis. Defective chips lead to repetition of experiments, which is undesirable due to high reagent cost and limited availability of samples. Prior work on fault detection in biochips has been limited to digital ('droplet') microfluidics and other electrode-based technology platforms. The paper proposes the first approach for automated testing of flow-based microfluidic biochips that are designed using membrane-based valves for flow control. The proposed test technique is based on a behavioral abstraction of physical defects in microchannels and valves. The flow paths and flow control in the microfluidic device are modeled as a logic circuit composed of Boolean gates, which allows test generation to be carried out using standard automatic test pattern generation tools. The tests derived using the logic circuit model are then mapped to fluidic operations involving pumps and pressure sensors in the biochip. Feedback from pressure sensors can be compared to expected responses based on the logic circuit model, whereby the types and positions of defects are identified. We show how a fabricated biochip can be tested using the proposed method, and demonstrate experimental results for two additional fabricated chips. © 1982-2012 IEEE.

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