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Thermal-Budget-Decoupled Integration of Freestanding Hafnium-Based Ferroelectric Dielectrics for van der Waals Memory Transistors
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Thermal-Budget-Decoupled Integration of Freestanding Hafnium-Based Ferroelectric Dielectrics for van der Waals Memory Transistors

Song Zhao, Ming-Chun Zheng, Feng-Shou Yang, Che-Yi Lin, Bo-Cia Chen, Rahul, Kenji Watanabe, Takashi Taniguchi, Yen-Lin Huang, Chang-Hong Shen, …
Advanced Materials (Weinheim), e74847
30/08/2026
PMID: 42668432
Web of Science ID: WOS:001862467600001

摘要

Chemistry Chemistry, Multidisciplinary Chemistry, Physical Materials Science, Multidisciplinary Nanoscience & Nanotechnology Physics, Applied Physics, Condensed Matter Science & Technology Science & Technology - Other Topics Materials Science Physical Sciences Physics Technology
Ferroelectric memories have emerged as promising candidates for nonvolatile memory and neuromorphic computing owing to their capability for direct channel modulation through polarization switching. However, the high thermal budget required for synthesis and post-annealing processes hampers scalable integration and degrades interfacial quality. Here, we present a freestanding hafnium-based ferroelectric strategy that enables the fabrication of high-performance top-gate ferroelectric field-effect transistors (FeFETs) on van der Waals (vdW) MoS2 channels at low temperatures without post-annealing. The freestanding Hf0.5Zr0.5O2 (FS-HZO) FeFETs, featuring a metal-ferroelectric-metal-insulator-semiconductor (MFMIS) architecture, exhibit a pronounced anticlockwise normalized memory window of 0.56 V nm-1. They demonstrate proof-of-concept nonvolatile behavior with endurance exceeding 2 & times; 103 cycles, retention over 2 & times; 103 s, and stable operation up to 85 degrees C, maintaining an on/off ratio of 106 and an extrapolated value of 104 after 10 years. Precise ferroelectric control of the MoS2 channel conductance enables multilevel switching and synaptic plasticity, achieving high accuracy in image recognition tasks. This work provides a low-thermal-budget freestanding hafnium-based integration strategy and a device-level building block for future vdW FeFET arrays, offering a promising pathway toward energy-efficient compute-in-memory and neuromorphic architectures.

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