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Three-dimensional 4F2 ReRAM with vertical BJT driver by CMOS logic compatible process
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Three-dimensional 4F2 ReRAM with vertical BJT driver by CMOS logic compatible process

Ching-Hua Wang, Yi-Hung Tsai, Kai-Chun Lin, Meng-Fan Chang, Ya-Chin King, Chrong Jung Lin, Shyh-Shyuan Sheu, Yu-Sheng Chen, Heng-Yuan Lee, Frederick T. Chen, …
IEEE Transactions on Electron Devices, 卷.58(8), 頁碼.2466-2472
08/2011

摘要

Contact resistive RAM (CR-RAM) current bias method high resistance state (HRS) low resistance state (LRS) NVM set/reset current Electrical and Electronic Engineering Electronic Optical and Magnetic Materials
A new 3-D vertical bipolar junction transistor (BJT) resistive-switching memory (ReRAM) cell with complimentary metal-oxide-semiconductor-compatible process has been demonstrated and characterized. A new logic-compatible BJT is vertically formed underneath the resistive stacked film of TiN/Ti/HfO 2 /TiN as a high-performance current driver and bit-cell selector. Using a shallow and tiny N-type lightly doped drain to be an emitter connects with ReRAM film as the bitline, a very thin and self-aligned P-pocket implant layer to be the wordline, and the N-well is the collector of the cells. As a result, the new 3-D ReRAM cell is very area saving and efficiently operated by the high-gain (β 50) BJT at a low voltage of 2 V for reset and 1.5 V for set. By adapting the highly shrinkable 3-D BJT current driver in ReRAM, the ReRAM is fully decoupled with the gate length and oxide thickness of logic metal-oxide-semiconductor field-effect transistors; furthermore, it can easily be scaled down to 4F 2 under the lithographic limitation of defining ReRAM film with F 2 area. © 2010 IEEE.

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