Threshold Voltage Adjustment by Varying Ge Content in SiGe p-Channel for Single Metal Shared Gate Complementary FET (CFET)

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Chong Jhe Sun, Chen Han Wu, Yi Ju Yao, Shan Wen Lin, Siao Cheng Yan, Yi Wen Lin 和 Yung Chun Wu

Nanomaterials (Basel, Switzerland), 卷.12(20), 頁.3712

01/10/2022

PMID: 36296902

摘要

CMOS inverter

complementary FET (CFET)

SiGe

technology computer-aided design (TCAD)

threshold voltage adjustment

url

https://doi.org/10.3390/nano12203712檢視

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題名: Threshold Voltage Adjustment by Varying Ge Content in SiGe p-Channel for Single Metal Shared Gate Complementary FET (CFET)
創作者：: Chong Jhe Sun - National Tsing Hua University
Chen Han Wu - National Tsing Hua University
Yi Ju Yao - National Tsing Hua University
Shan Wen Lin - National Tsing Hua University
Siao Cheng Yan - National Tsing Hua University
Yi Wen Lin - National Tsing Hua University
Yung Chun Wu - Department of Engineering and System Science, National Tsing Hua University, Hsinchu, Taiwan
補助款備註: European Defence Agency (http://data.elsevier.com/vocabulary/SciValFunders/100018894) Taiwan Semiconductor Research Institute National Science and Technology Council (http://data.elsevier.com/vocabulary/SciValFunders/501100020950) Taiwan Semiconductor Research Institute, Taiwan NSTC 109-2221-E-007-031-MY3; NSTC 111-2119-M-007-010-MBK; NSTC 111-2218-E-A49-015-MBK / National Science and Technology Council (http://data.elsevier.com/vocabulary/SciValFunders/501100020950)
學術資源類型: 期刊文章
出版日期: 01/10/2022
出版資訊: Nanomaterials (Basel, Switzerland), 卷.12(20), 頁.3712
語言: 英語