摘要
Nowadays, more and more instrumentations are needed in an electronic system to monitor the operating conditions such as temperature, voltage supply condition, and wearing situation so that the system can identify a potential failure before it strikes to avert catastrophic consequences. To support such a need, Time-to-Digital Converter is an inevitable building block. In this work, we present an automatic Time-to-Digital Converter (TDC) compiler, built upon a resilient architecture incorporating a self-calibration scheme and a range-adjustment scheme. This compiler is further enhanced by a &null cell analysis&null technique, to guide the customization process of a TDC for a new process to support the trade-offs among different design requirements such as area, timing resolution, and operating range. We have applied this TDC compiler to generate a TDC macro embedded in a test chip fabricated in a 90nm CMOS process for effective on-chip instrumentation of dynamic voltage drops and temperature variations.