摘要
This study introduces a novel weight freezing technique that significantly minimizes the number of pulses needed for high-accuracy performance in FeFETs under multi-level cell operations. Utilizing this method, only an average of 64 pulses are needed to reach a 90% accuracy (similar to 94.4% pulsing number reduction compared to the traditional approach). Additionally, our weight-freezing method effectively enhances network convergence ability when accounting for significant cycle-to-cycle variations (10% variations). Furthermore, the recovery cycling procedure stabilizes multi-level cell (MLC) switching. Combining weight freezing and recovery cycling, FeFET-based synapses exhibit an improvement in Modified National Institute of Standards and Technology (MNIST) recognition, from an initial 30.5% to 90.5%. Thus, this approach combining weight freezing methodology and recovery cycling scheme is attractive for compute-in-memory applications toward stable online training