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Via diode in Cu backend process for 3D cross-point RRAM arrays
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Via diode in Cu backend process for 3D cross-point RRAM arrays

Yu-Cheng Liao, Hsin-Wei Pan, Min-Che Hsieh, Tzong-Sheng Chang, Yu-Der Chih, Ming-Jinn Tsai, Chrong Jung Lin 和 Ya-Chin King
IEEE Journal of the Electron Devices Society, 卷.2(6), 頁碼.149-153
11/2014
DOI: https://doi.org/10.1109/JEDS.2014.2339296

摘要

Advanced 28nm CMOS technology cross-point embedded nonvolatile memory resistive random access memory sneak current Biotechnology Electrical and Electronic Engineering Electronic Optical and Magnetic Materials
In this paper, a fully logic compatible via diode is developed for high-density resistive random access memory (RRAM) array applications. This novel via diode is realized by advanced 28nm CMOS technology with Cu damascene via. The device is stacked between a top Cu via and a bottom Cu metal with a composite layer of TaN/TaON based dielectric film. An asymmetric current-voltage characteristic in this MIM structure provides a forward/reverse current ratio up to (10 -6 ). In a cross-point RRAM array, the suppression of sneak current path by incorporating this via diode enables array size to be greatly expended. Via diode provides an excellent solution for high-density embedded nonvolatile memory applications in the nano-scale CMOS technology.

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