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Bit Line Tracking Scheme With Cell Current Variation And Substrate Noise Consideration For SRAM Devices
Patent

Bit Line Tracking Scheme With Cell Current Variation And Substrate Noise Consideration For SRAM Devices

Taiwan Semiconductor Manufacturing Company and 張孟凡
04/05/2004

Abstract

Described are a method and device for tracking memory cell currents using a tracking memory cell circuit wherein the challenges resulting from current degradation and process variations are eliminated. A special strap cell is provided to eliminate ground bounce phase shifting. The tracking and strap cells along with the tracking scheme allow for better tracking of current within the array without the necessity of adding timing margin. The tracking memory cell circuit is a modified version of the memory cell used in the memory array and provides a reference current for the sense amplifier that is compared against the addressed memory cell. Tracking cells are placed in the center of the memory array making them nearer to the active memory cells. As a result, they better mirror the physical and electrical characteristics of the active memory cells over previous methods.

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