Abstract
A 3D-IC detector for each layer of a stacked device with N layer, includes a dividing-two circuit coupled to a (N-1) signal; a first comparator is coupled to the dividing-two circuit, wherein an input A is coupled to an initial layer number signal, an input B of the first comparator is coupled to an output of the dividing-two circuit; a second comparator is coupled to the initial layer number by an input A of the second comparator, and a num is coupled to an input B of the second comparator; a first Add/sub circuit is coupled to the num via an input A of the first Add/sub circuit, and coupled to the first comparator via an input B of the first Add/sub circuit, to the second comparator via an input +/- signal of the first Add/sub circuit; and a second Add/sub circuit coupled to the first comparator via an input A of the second Add/sub circuit, to the num via an input B of the second Add/sub circuit.