Abstract
The present disclosure, in some embodiments, relates to a method of forming a transistor device. The method may be performed by forming an anode and a cathode over an electron supply layer disposed on a semiconductor material. A doped III-N semiconductor material is formed over the electron supply layer, and an insulating material is formed over the electron supply layer and the doped III-N semiconductor material. The insulating material continuously extends from over the anode to over the cathode. The insulating material is patterned to form sidewalls of the insulating material that define an opening over the doped III-N semiconductor material. A gate structure is formed directly between the sidewalls of the insulating material and over the doped III-N semiconductor material.