Abstract
A method for register transfer level power estimation in chip design includes the steps of: (A) parsing all possible condition branches of conditional statements in a register transfer level code, and establishing power modes inducible by each of the possible condition branches; (B) selecting a plurality of representative input vector sets from input vector sets recorded in the chip specification, and constructing linear characterization formulas corresponding to the power modes based on the selected input vector sets; and (C) calculating power values from the linear characterization formulas that correspond to the power modes, and obtaining an average power consumed by the chip from the calculated power values.