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Programmable Built In Self Test For Embedded DRAM
Patent

Programmable Built In Self Test For Embedded DRAM

Global Unichip Corporation, 黃稚存, Wu, Chi-Feng, Huang, Jing-Reng and Wu, Cheng-Wen
01/07/2002

Abstract

In the present invention a built in self test (BIST) for an embedded memory is described. The BIST can be used at higher levels of assembly and for commodity memories to perform functional and AC memory tests. A BIST controller comprising a finite state machine is used to step through a test sequence and control a sequence controller. The sequence controller provides data and timing sequences to the embedded memory to provide page mode and non-page mode tests along with a refresh test. The BIST logic is scan tested prior to performing the built in self test and accommodations for normal memory refresh is made throughout the testing. The BIST also accommodates a burn-in test where unique burn-in test sequences can be applied.

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