Abstract
The invention provides a structure and a manufacturing method thereof for reducing a stress of a chip. The structure comprises a through-silicon via (TSV), a plurality of reinforcing base and a plurality of base bodies. The reinforcing bases are disposed near and around the TSV. The base bodies are disposed near and around the TSV, and the base is disposed on a side of the reinforcing base. The reinforcing base or the base body does not connected with the TSV. According to the invention, the reinforcing base, the base bodies and reinforcing connections are disposed near and around the TSV, so as to improve lateral rigidity and longitudinal rigidity of chips and preventing chip damage caused by warpage.