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三維高密度多微電子元件之晶圓級系統封裝結構
Patent

三維高密度多微電子元件之晶圓級系統封裝結構

江國寧, 李昌駿, 江國寧 and 彭治棠
15/09/2005

Abstract

A stacked electronic packaging structure with plural microelectronic devices, which could diminish the volume of packaging structure and reduce the transmissive time of electronic signals among devices to increase the operated efficiency, would be proposed in this invention. This structure includes one substrate with one or plural cavities and one or plural microelectronic devices which stacked on both the cavities and the surface of the said substrate. The said substrate has an active region of electronic circuit. The microelectronic devices could be made elsewhere or be fabricated on the substrate directly. The crosstalk among microelectronic devices would be avoided by using the insulating layers. In addition, the electronic signal connection between said substrate and said microelectronic devices is established by the electronic transmission structure, which are composed of one or plural electrodes directly thereon the said substrate, circuit patterns, one or plural electrodes thereon each the said microelectronic device, one or plural bonding structures for connecting other different packaging devices, and one or plural through-holes within the insulating layers.

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