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以晶片之導電墊片耦合於佈線基材之導電墊片之封裝
Patent

以晶片之導電墊片耦合於佈線基材之導電墊片之封裝

南茂科技股份有限公司, 曾國泰 and 江國寧
30/04/2002

Abstract

In the present invention, a printed circuit board whose thermal expansion coefficient matches with that of the chip, and which comprises insulating semiconductor material substrate such as ceramic material, glass substrate, etc., is disposed on the bottom layer for use as the heat dissipating, wiring, and supporting back plate. Then a metal lead frame is coupled to the peripheral conductive pad of the wiring substrate, and a covering chip is disposed on top of it. The chip has the input/output conductive pad and is coupled to the conductive pad located at the center of the wiring substrate, so as to complete the package of covering chip. The effect obtained from such a product is especially suitable for the mass production of a single row of leads, or dual row of leads, and also good for integrated package of plural chips. The technology is especially suitable for the mass production of dual row package of leads, and also can be applied in the package of three-row, or four-row products.

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