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使用形成於銲錫接墊上金屬銷子進行封裝之方法
Patent

使用形成於銲錫接墊上金屬銷子進行封裝之方法

台灣積體電路製造股份有限公司, 江國寧 and 張國欽
15/03/2006

Abstract

A semiconductor assembly has solder bumps with increased reliability. One embodiment of an assembly comprises a first substrate having at least one conductive pad on its surface; a second substrate having at least one conductive pad on its surface; at least one conductive stud; and at least one solder bump in contact with the conductive pad on the first substrate, and in contact with the conductive pad of the second substrate, and formed around the at least one conductive stud. Methods for providing these assemblies are included.

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