Abstract
An electronic device includes three delay-locked loops, three dummy voter circuits, and a voter circuit. Each of the three delay-locked loops has a first input end, a second input end, an output end to maintain the phase difference between a reference clock signal received from the first input end and an intermediate clock signal output from the output end. Each of the three dummy voter circuits is connected between the second input end and the output end of each of the three delay-locked loops to delay the phase of the intermediate clock signal by the phase difference. The voter circuit receives the intermediate clock signal from each of the three delay-locked loops, and outputs an output clock signal according to the logic of the intermediate clock signal from each of the three delay-locked loops. The phase difference compensates for the phase delay of the intermediate clock signal passing through the voter circuit.