Abstract
A process for preparing the selective grid of grid-splitted flash memory cell features that the selective grid is formed on the side wall of the channel on basic semiconductor material to reduce the transverse size of selective grid and keep the length of channel, and includes generating a channel in the basic semiconductor material at one side of suspended grid structure, generating a dielectricpolysilicon layer on the suspended grid structure and side wall of channel, and generating a polysilicon spacer on the side wall of said dielectric polysilicon layer to obtain the selective grid. Itsadvantages are high write-in efficiency and low writing current.