Abstract
A signal compensation circuit suitable for use in switching capacitor circuit is disclosed in the present invention. The invention includes a switching capacitor circuit, which has a differential mode sampling signal input terminal, a reference voltage input terminal, a clock input terminal and a differential mode output terminal; a clock generation circuit, which generates two clock signals for supplying the required clock signal of the switching capacitor circuit; a compensation switch, which is connected in between the output terminal of the switching capacitor circuit and a serial connection point, and is also connected to the clock generation circuit for receiving the first clock signal; a compensation capacitor, which is connected in between a serial connection point and an electric power supply terminal that supplies a predetermined electric potential; and a common electric switch, which is connected in between a serial connection point and the common electrode, and is connected to the clock generation circuit for receiving the second clock signal.