Abstract
A power aware simulation system comprising an embedded multi-core simulation module, a power abstract interpretation module and a C power estimation (CPE) power profiling module. The embedded multi-core simulation module comprises a plurality of digital signal processors (DSP), an external memory and a direct memory access. Each of the plurality of DSPs comprises a DSP core, an instruction cache and a local memory. The power abstract interpretation module is coupled to the plurality of DSPs, the external memory, the DMA and the CPE profiling module, respectively.