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半導體之貫孔內連接線的製造方法
Patent

半導體之貫孔內連接線的製造方法

國立清華大學, 方維倫, 林佳漢 and 李豐宇
30/06/2013

Abstract

A method for fabricating interconnects in through-semiconductor-via, comprising the following steps: first, providing a board having a trough and a connecting surface which are both disposed on a side of the board; second, filling the trough with a electrically conducting material; then contacting the connecting surface with a substrate having at least one through-semiconductor-via such that the through-semiconductor-via communicates with the trough; subsequently, heating the electrically conducting material to a working temperature so as to transform into a liquid state and flow into the through-semiconductor-via; finally, cooling the electrically conducting material to form a interconnect in the through-semiconductor-via. Thereby, the method has advantages of simple steps and saving process time. Moreover, the yield is improved and the manufacture cost is lowered.

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