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厚閘極介電層電晶體之製造方法
Patent

厚閘極介電層電晶體之製造方法

力旺電子股份有限公司, 金雅琴, 林崇榮 and 陳信銘
16/03/2008

Abstract

A fabricating method of MOSFET with thick gate dielectrics layer is provided. A substrate having a first region and a second region is provided. A plurality of isolation structure is formed in the substrate. A pad layer and a mask layer are formed in sequence on the substrate between the isolation structures. After the mask is removed, the pad layer at the second region is removed. A dielectric layer and a conductive layer are formed in sequence on the substrate. The conductive layer, the dielectric layer and the pad layer is patterned to form a first gate structure at the first region and a second gate structure at the second region. A first source region and a first drain region are formed in the substrate at the sides of the first gate structure. A second source region and a second drain region are formed in the substrate at the sides of the second gate structure.

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