Abstract
A one-time programmable memory cell comprising a gate dielectric layer, a gate electrode, a first source/drain, a second source/drain, a first salicide layer, a capacitive dielectric layer, a first conductive plug and a second conductive plug is disclosed. The gate electrode is disposed on the gate dielectric layer. The first source/drain and the second source/drain are disposed at opposing sides under the gate electrode, respectively. The first salicide layer is disposed on the first source/drain. The capacitive dielectric layer is disposed on the second source/drain. The first conductive plug is disposed on the first salicide layer. The second conductive plug is disposed on the capacitive dielectric layer. The size of the first conductive plug is different form the size of the second conductive plug.