Abstract
The invention relates to multi-thread power gating design, setting idle components into a sleep mode to reduce leakage power consumption. Based on compiler techniques, the invention arranges conditional power gating instructions into every thread of a many-happen-in-parallel region of a multi-thread program. A conditional power on instruction determines whether the corresponding component has been turned on already, and turns on the component when it is off. A conditional power off instruction determines whether the corresponding component will be idling in the rest of the may-happen-in-parallel region, and turns off the component when it will be idling.