Abstract
The disclosed multi-chip stacked structure comprises a bottom layer having a substrate of circuit redistribution layer; a first chip including at least one non-conductive layer and a metal layer, the non-conductive layer being provided with a metal-filled channel, the metal layer being placed upside down on the circuit redistribution layer of the bottom layer chip; at least two stacked chips that are stacked upwardly in sequence, each of the stacked chips having at least a metal layer; and a non-conductive layer provided with a metal-filled channel for electrically connecting the metal layer corresponding to the stacked chips, wherein the metal-filled channel of the non-conductive layer stacked at the most bottom is electrically connected with the metal-filled channel of the non-conductive layer of the first chip. This structure can significantly decrease the thermal design complexity due to increasing number of metal-filled layers, thereby enhancing heat-dissipating performance.