Abstract
An improved process for producing complementary metal oxide semiconductor(CMOS), which comprises the following steps: provides a silicon base in which the silicon base has an N- area and aP- area and forms a field oxide so as to segregate the element area; forms a gate oxide on the silicon base; precipitates a layer of poly with phosphorous dopant and on the layer ofpoly with phosphorous dopant precipitates a poly without phosphorous dopant; loads photo resistor to cover the gate area and etches away the exposed polywithout phosphorous dopant and poly with phosphorous dopant to form adivided gate structure and removes the photo resistor; loads the photo resistor to cover the P- area and to expose the N- area andundergoes P- type ion implantation to form the source area/drain area ofP- channel element and in situ dopes P- poly gate layer, and then removesthe photo resistor; loads the photo resistor to cover the N- area and to expose the P- area toform he source area/drain area of N- channel element and is situ dopesN- poly gate layer, and then removes the photo resistor; and provides appropriate metallurgy and connects the elements to form thedesired CMOS integrated circuit.