Abstract
A probe structure of wafer level test card is disclosed, which comprises at least a first insulation film layer coated on the substrate, wherein the first insulation film layer comprises a cavity formed on the lower surface and recesses toward the inside, and a buffer object filled into the cavity to absorb the stress resulted from contacting the object to be tested during the measurement. The second insulation film layer is coated on the first insulation film layer and the buffer object to protect the buffer object, which comprises a through hole formed in the first insulation film layer and the second insulation film layer. The circuit pattern is formed on the second insulation film layer and filled into the through hole. The third insulation film layer is coated on the second insulation film layer and the circuit pattern to prevent the circuit pattern from oxidizing. A vertical probe is formed on the circuit pattern and corresponding to the buffer object. A reinforcing material wraps the vertical probe to reinforce its hardness and increase its strength against deformation.