Abstract
The invention relates to a component-activity data flow equation on compiler for low power instruction sets and the system primarily comprises three subsystems of the construct control flow graph, the equation analysis for primary data as component and the instruction codes optimization. Locate the block of certain component in source codes without activity for long while during the activity state of each component when processor is executing, and using the data compiler inserts sleep function of component before the block to speed up the sleep state of component, achieving power saving effect. The invention can be both applied to component environment of hardware; if a hardware component is idle for a while, it will automatically shut off power. Targeting at different instruction arrangement of compiling, the invention collects power on and off states of component during execution and assesses different command arrangement so as to ascertain which can save more power in terms of component activity. The invention can be applied to portable electronic appliance, chip of portable communication equipment and embedded system.