Abstract
A thin film transistor comprises a pattern silicon layer, a gate insulator layer and a gate is provided. The pattern silicon layer including a first source/drain region, a second source/drain region and a plurality of channels connecting between the first source/drain region and the second source/drain region is configured on a substrate. The gate insulator layer is configured on a substrate so that covers a portion of the plurality of channels. The gate is configured on the gate insulator layer. The thin film transistor further comprises light doped drain region located between the first source/drain region and plurality of channels, and between the second source/drain region and the plurality of channels. The thin film transistor with the plurality of channels and the light doped drain region can reduce the leakage current and the sub-threshold swing, increase the ION/IOFF ratio and improve the drain induced barrier lowering phenomenon.