摘要
本發明揭露記憶體控制模組與方法以及錯誤更正碼編/解碼電路與方法。記憶體控制模組包含：一暫存單元、一錯誤更正碼單元以及一讀寫控制單元。暫存單元用來暫存一目標資料。錯誤更正碼單元包含複數個第一編碼器及一第二編碼器；第一編碼器對該目標資料進行編碼運算以產生複數組第一同位元檢查位元，該複數組第一同位元檢查位元係具有至少兩種長度；第二編碼器對該目標資料及該複數組第一同位元檢查位元進行編碼運算，以產生一組第二同位元檢查位元。讀寫控制單元將該目標資料、該複數組第一同位元檢查位元及該組第二同位元檢查位元轉換成該記憶體模組之資料格式。
This invention discloses a memory control module and its associated method, and an error-correcting code (ECC) encode/decode circuit and its associated method. The memory control module includes a buffer, an ECC unit, and a read/write control unit. The buffer is to store target data. The ECC unit includes a plurality of first encoders and a second encoder. The first encoders perform an encoding operation on the target data and generate a plurality of first parity check bit sets, which have at least two kinds of lengths. The second encoder performs an encoding operation on the target data and the first parity check bit sets and generates a second parity check bit set. The read/write control module converts the target data, the first party check bit sets and the second parity check bit set into a data format of a memory module.