Abstract
The invention discloses a back-termination circuit. The back-termination circuit comprises a first resistor, a first transistor, a second resistor, and a second transistor. The first resistor and the first transistor are series connection for forming a first impendence unit. A first source of the first transistor is connected to a working voltage with VTT. The second resistor and the second transistor are series connection for forming a second impendence unit. A second gate and a second drain of the second transistor are connected to the working voltage with VTT. Wherein, the first impendence unit and the second impendence unit are parallel series connection. The first transistor or the second transistor is switched on though a power source, and the first transistor and the second transistor change the impedance actively to a load within the voltage source.