Abstract
A nonvolatile memory with twin gate formed on N-well is disclosed. The nonvolatile memory includes a first gate, a second gate, a pair of NO (Nitride/Oxide) spacer layer, a pair of ONO (Oxide/Nitride/Oxide) spacer, source/drain regions, and extension source/drain regions. The NO (Nitride/Oxide) spacer layers are formed at the inner sidewalls of the first gate and the second gate to form a U shape spacer for one bit data storage. The ONO (Oxide/Nitride/Oxide) spacers are formed at the outer sidewalls of the first gate and the second gate. The source/drain regions and extension source/drain regions have P-type dopant.