Abstract
A tunneling transistor with an asymmetric gate includes a substrate, a first polarity portion, a second polarity portion, a channel portion, a gate structure and an insulator. The first polarity portion and the second polarity portion are formed on the substrate. The channel portion is connected between the first polarity portion and the second polarity portion, and includes a first section and a second section. The gate structure includes a surrounding portion encircling around the first section, and a flat portion covering one side of the second portion away from the substrate. The insulator includes a first insulating portion which is disposed between the first section and the surrounding portion, and a second insulating portion which is disposed between the second section and the flat portion. Through the asymmetric gate, the tunneling transistor has the advantages of a high on-state current and a low off-state current.