Logo image
高电子迁移率晶体管及其形成方法
Patent

高电子迁移率晶体管及其形成方法

台湾积体电路制造股份有限公司, 许竣为, 余俊磊, 姚福伟, 陈柏智, 杨富智, 游承儒 and 黃敬源
29/01/2014

Abstract

A semiconductor structure includes a first III-V compound layer. A second III-V compound layer is disposed on the first III-V compound layer and is different from the first III-V compound layer in composition. A source feature and a drain feature are disposed on the second III-V compound layer. A gate electrode is disposed over the second III-V compound layer between the source feature and the drain feature. A fluorine region is embedded in the second III-V compound layer under the gate electrode. A gate dielectric layer is disposed over the second III-V compound layer. The gate dielectric layer has a fluorine segment on the fluorine region and under at least a portion of the gate electrode.

Metrics

1 Record Views

Details

Logo image